ABOUT US

Scanimetrics is a semiconductor interconnect company that has developed testing solutions to address the issues imposed on semiconductor manufacturers. Testing is a required part of the interconnect system.

As designs move to smaller nanometer processes, test development is becoming more difficult. Today's nanometer-scale ICs call for extensive changes in all facets of the design flow. The need for advanced interconnects and packages have become more critical. Chip designs are shrinking the chip scaling in the aluminum or copper interconnects causing chip interface bottlenecks. Our patented interconnect technology can be used to improve the way processes are monitored, the way devices are tested, chip performance, and lowers costs. Higher integration is achieved through the use of the technology both to enable 3D packaging and to improve performance of smaller chips.

The semiconductor industry spends billions each year improving performance and reducing cost of integrated circuits. The processing monitoring products specifically the BGA and related market is 24.3 billion units[1]. Scanimetrics projections are to capture $9.7 million in the multi-million dollar LCD product market, $250 million in the multi-billion dollar interconnect product market and $7.7 million in BGA and related market.

Moore's Law is the prediction that the number of transistors that can be manufactured inexpensively into an integrated circuit doubles approximately every two years. This exponential growth has driven the semiconductor industry to continually develop products with increased performance and lower costs. Over the last 40 years, the cost and size of semiconductor transistors has been decreasing exponentially as predicted by Moore's Law.

Scanimetrics' mission is "Helping Enable Moore's Law for Nanoscale Devices".

The market is driving the need for products that are smaller, faster and lighter while still maintaining complex electronic functions. This has resulted in the need to have more transistors fitting in the same space, improved performance and greater energy efficiencies. As the transistors shrink towards 45 nm and beyond, the technologies used today do no scale well.

Scanimetrics is positioned to have significant influence on chip performance and cost.